首页> 外文会议>2015 4th Mediterranean Conference on Embedded Computing >Design and high-performance hardware architecture for image coding using block-lifting-based quaternionic paraunitary filter banks
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Design and high-performance hardware architecture for image coding using block-lifting-based quaternionic paraunitary filter banks

机译:使用基于块提升的四元超自然元滤波器组进行图像编码的设计和高性能硬件架构

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In this paper, we have introduced a generalized block-lifting structure using the 2-D CORDIC algorithm as a block of 4-band linear phase paraunitary filter banks (LP PUFB) based on the quaternionic algebra (Q-PUFB) for the lossy-to-lossless image coding. A bank Q-PUFB based on the 2-D CORDIC block-lifting structure reduces the number of rounding operations and has a regular layout. Since the block-lifting structures with rounding operations can implement the integer-to-integer transform (Q-PUFB). The parallel-pipelined efficient architecture (PE_Q-PUFB) has been proposed. The low latency separable image processing is implemented in the given architecture.
机译:在本文中,我们介绍了一种基于二维四元代数(Q-PUFB)的,采用2-D CORDIC算法的广义块提升结构,作为基于四元代数(Q-PUFB)的4波段线性相位超单位滤波器组(LP PUFB)的块。无损图像编码。基于二维CORDIC块提升结构的库Q-PUFB减少了舍入操作的次数,并且布局规则。由于具有舍入运算的块提升结构可以实现整数到整数变换(Q-PUFB)。已经提出了并行流水线高效架构(PE_Q-PUFB)。低延迟可分离图像处理在给定的体系结构中实现。

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