An improved gate capacitance for two dimensional junctionless transistor

摘要

The junctionless transistor is one of the device structures which found tremendous potential in terms of reduction of short channel effects, scaling factors, capacitance & fabrication. In this paper we observed an improved gate capacitance (C) in depletion and inversion regions of a T-shape double gate junctionless transistor with comparison to the single gate junctionless transistor for different oxide thickness (t), doping concentration (N) and Gate lengths (Lg).