Technocrats Inst. of Technol., Bhopal, India;
CMOS logic circuits; comparators (circuits); integrated circuit design; low-power electronics; DSCH software; Microwind software; half precharged CMOS dynamic logic circuit; leakage current reduction; low-power comparator design; power consumption improvement; size 120 nm; size 70 nm; transmission transistor; CMOS integrated circuits; CMOS technology; Delays; Integrated circuit modeling; Layout; Logic circuits; Transistors; Delay; Dynamic Logic; Half precharged; Power optimization;
机译:基于传输门的混合CMOS逻辑低功耗高速平衡XOR-XNOR电路的单元设计方法
机译:CMOS四态逻辑的低功耗电压比较器电路
机译:低功耗比较器逻辑电路的CMOS VLSI设计
机译:基于CMOS动态逻辑电路的低功率比较器设计
机译:低功耗高速低偏移完全动态CMOS锁存器
机译:基于光纤的单壁碳纳米管晶体管电路对类似CMOS电路的稳定逻辑操作
机译:CMOS VLSI低功率比较逻辑电路设计