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Perspectives of TFETs for low power analog ICs

机译:低功耗模拟IC的TFET的观点

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In this paper we show that tunnel field effect transistors (TFETs) biased in the subthreshold region promise several advantages for low-power/high-frequency analog IC applications (e.g. GHz operation with sub-0.1 mW power consumption). Analytical and TCAD models for graphene nano-ribbon (GNR) and InAs/GaSb nanowire TFETs are employed, respectively, for the first time in subthreshold analog circuit examples using the gm/Id integrated circuit (IC) design technique. From comparison of these TFET technologies with traditional FETs it is observed that due to the higher currents per unit gate width at low voltage for TFETs, smaller, higher speed, and lower power analog circuits are enabled.
机译:在本文中,我们证明了偏置在亚阈值区域的隧道场效应晶体管(TFET)对于低功率/高频模拟IC应用(例如,功耗低于0.1 mW的GHz工作)具有若干优势。在亚阈值模拟电路示例中,首次使用g m / I d <分别使用石墨烯纳米带(GNR)和InAs / GaSb纳米线TFET的分析模型和TCAD模型。 / inf>集成电路(IC)设计技术。通过将这些TFET技术与传统FET进行比较,可以发现,由于TFET在低电压下每单位栅极宽度的电流较高,因此启用了更小,更高速度和更低功耗的模拟电路。

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