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Fine pitch solder-less bonding using ultrasonic technique

机译:采用超声波技术的细间距无焊料焊接

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Industry is adapting micro-bumps in the device structures in order to having module with multiple functions and capabilities within smaller area. Micro-bumps is coated with Tin (Sn) cap to facilitates solder interconnects formation between the chip and substrate. Electrochemical migration failure is a known issue related to flux residue on the solder joints after the thermal compression of the chip with solder cap micro-bumps on substrate. Electromigration is another issue related to shrinking interconnects. It is related to atomic displacement in a conductor line due to an applied current. In this study, the micro bumps are directly bonded to the substrate without solder cap and thus there is no electro migration failure concern. The chip used in this study is of size 7mm × 7mm × 0.05mm and consists of peripheral micro-solder bumps at 40μm pitch with no solder cap. Ultra-sonic process was adopted to form the direct metal to metal joint between the chip and substrate. Ultrasonic process offered several advantages such as lower bonding temperature and shorter bonding duration over thermal compression process. However, the US process demand bumps with good co-planity of less than 0.6μm and good surface finishing. The copper bumps were coated either with TiAu, ENEPIG, and ENEP to prevent oxidation occurring during the bonding process. Detail DOE experiment was conducted to evaluate the bonding quality. Shear test and x-section analysis revealed that chips coated with either TiAu or ENEPIG could form a bond on silicon substrate coated with TiAu with optimized US parameters. The developed US bonding process successfully demonstrated on C2C application.
机译:工业界正在使器件结构适应微型凸点,以便在较小的面积内具有多种功能的模块。微型凸块涂有锡(Sn)盖,以促进芯片和基板之间形成焊料互连。电化学迁移失败是与芯片热压后在基板上带有焊帽微凸点的芯片上的焊点上残留的助焊剂有关的已知问题。电迁移是与互连缩小有关的另一个问题。这与由于施加电流导致的导线中的原子位移有关。在这项研究中,微凸块直接焊接在没有焊料盖的基板上,因此无需担心电迁移失败。本研究中使用的芯片尺寸为7mm×7mm×0.05mm,由间距为40μm的外围微焊料凸块组成,没有焊料盖。采用超声波工艺在芯片和基板之间形成直接的金属对金属接合。与热压工艺相比,超声波工艺具有许多优势,例如更低的粘合温度和更短的粘合时间。但是,美国的工艺要求凸点具有小于0.6μm的良好共面性和良好的表面光洁度。铜凸块均涂有TiAu,ENEPIG和ENEP,以防止在键合过程中发生氧化。进行了详细的DOE实验以评估粘合质量。剪切测试和X射线断面分析表明,涂有TiAu或ENEPIG的芯片可以在涂有TiAu的硅基板上形成键合,具有最佳的US参数。发达的美国邦定工艺已在C2C应用中成功展示。

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