Fabrication and Characterization of Vertically Stacked Gate-All-Around Si Nanowire FET Arrays

摘要

We describe the fabrication of vertically stacked Silicon Nanowire Field Effect Transistors (SiNW FETs) in Gate-All Around (GAA) configuration. Stacks with the number of channels ranging from 1 to 12 have been successfully produced by means of a micrometer scale lithography and conventional fabrication techniques. It is shown that demonstrator Schottky Barrier (SB) devices fabricated with Cr/NiCr contacts present good subthreshold slope (70mV/dec), I_(ON)/I_(OFF) ratio ≥10~4 and reproducible ambipolar behavior.