HYBRID INTEGRATION FABRICATION OF NANOWIRE GATE-ALL-AROUND GE PFET AND POLYGONAL III-V PFET CMOS DEVICE

摘要

The present invention provides a method of manufacturing nanowire semiconductor device. In the active region of the PMOS the first nanowire is formed with high hole mobility and in the active region of the NMOS the second nanowire is formed with high electron mobility to achieve the objective of improving the performance of nanowire semiconductor device.