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Interconnects - A Porous Future

机译:互连-前景广阔

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摘要

Interconnection technology is entering the era of the void. The requirement for low permittivity dielectrics has led the electronics community to reduce the material density of the dielectrics, whether that be a uniform density material or, as in the case of air gaps, the averaged density of the material between the lines. This trend results in a great many difficulties to ponder, and a considerable slip in the schedule for introducing these materials. The method of decreasing the k value in order to stay close to the International Technology Roadmap for Semiconductors (ITRS) is to increase porosity. However, this makes the dielectrics weaker and more susceptible to damage from etching, ashing, and polishing. Methods have emerged for handling these things, and the predicted scaling itself, in which aspect ratio is relatively constant makes possible shortened exposure to the processes that create damage layers.
机译:互连技术正在进入虚无时代。对低介电常数电介质的需求已导致电子学界降低电介质的材料密度,无论是均匀密度的材料还是气隙情况下的线之间材料的平均密度。这种趋势导致了很多困难的思考,并且引入这些材料的时间表大大减少了。减小k值以使其接近国际半导体技术路线图(ITRS)的方法是增加孔隙率。然而,这使得电介质更弱并且更容易受到蚀刻,灰化和抛光的损害。已经出现了处理这些问题的方法,并且预测的缩放比例本身(纵横比相对恒定)可以缩短对产生损坏层的过程的暴露。

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