首页> 外文会议>12th Annual Pan Pacific Microelectronics Symposium amp; Tabletop Exhibition: International Technical Interchange >USING UNDERFILLS TO ENHANCE DROP TEST RELIABILITY OF Pb-FREE SOLDER JOINTS IN ADVANCED CHIP SCALE PACKAGES
【24h】

USING UNDERFILLS TO ENHANCE DROP TEST RELIABILITY OF Pb-FREE SOLDER JOINTS IN ADVANCED CHIP SCALE PACKAGES

机译:使用底料来增强高级芯片级封装中无铅焊料接头的跌落测试可靠性

获取原文
获取原文并翻译 | 示例

摘要

In this paper we compare the reliability of two different sized area array components: 0.4mm pitch wafer level chip scale packages (WLCSP) and 0.5 mm pitch chip scale package (CSP). The reliability of these devices, in both Sn/Pb and lead-free assemblies are evaluated using industry standard drop test methodology. The improvement of the reliability of these devices thorough the use of underfill systems is also demonstrated.
机译:在本文中,我们比较了两种不同尺寸的面积阵列组件的可靠性:0.4mm间距的晶圆级芯片尺寸封装(WLCSP)和0.5mm间距的芯片尺寸封装(CSP)。这些器件在Sn / Pb和无铅组件中的可靠性均使用行业标准的跌落测试方法进行了评估。还证明了通过使用底部填充系统可以提高这些设备的可靠性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号