SOI/CMOS (Si-On-Insulator/CMOS) Circuits Fabricated in Zone-Melting-Recrystallized Si Films on SiO2-Coated Si Substrates

摘要

A CMOS test circuit chip containing six arrays of 360 to 533 paralled transistors, two 31-stage ring oscillators, and two inverter chains has been designed for evaluating SOI wafer prepared by using the graphite strip-heater technique for zone-melting recrystallization of poly-Si filme on SiO2-coated Si substrates. One 2-in-diameter wafer has been evaluated in detali by testing all the circuits on each of 98 chips fabricated in the recrystallized film. These measurements reveal a good yield of functional circuits, and most of the failures can be explained by obvious metallization defects. The operating charactiersitics of each type of circuit are quite uniform from chip to chip. For the ring oscillators, which have a 5 micron gate length and fan in and out on one, at a supply voltage of 5V the switching delay time is about 2 n s per stage and the power-delay product is 0.2-0.3 pJ per stage.