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TRANSISTORLESS ALL-MEMRISTOR NEUROMORPHIC CIRCUITS FOR IN-MEMORY COMPUTING
TRANSISTORLESS ALL-MEMRISTOR NEUROMORPHIC CIRCUITS FOR IN-MEMORY COMPUTING
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机译:用于内存计算的无晶体管全忆阻神经形态电路
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摘要
A circuit for multiplying a number N of first operands each by a corresponding second operand, and for adding the products of the multiplications, with N ≥ 2; the circuit comprising: N input conductors; N programmable conductance circuits connected each between one of the input conductors and at least one output conductor; each programmable conductance circuit being arranged to be programmable at a value depending in a known manner from one of the first operands; each input conductor being arranged to receive from an input circuit an input train of voltage spikes having a spike rate that derives in a known manner from one of the second operands; and at least one output circuit arranged to generate an output train of voltage spikes having a spike rate that derives in a known manner from a sum over time of the spikes received on the at least one output conductor.
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