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Antenna-free high-k gate dielectric for a gate-all-around transistor and methods of forming the same

机译:用于栅极 - 全面晶体管的天线高k栅极电介质和形成相同的方法

摘要

A gate-all-around field effect transistor may be provided by forming a sacrificial gate structure and a dielectric gate spacer around a middle portion of a semiconductor plate stack. A source region and a drain region may be formed on end portions of semiconductor plates within the semiconductor plate stack. The sacrificial gate structure and other sacrificial material portions may be replaced with a combination of a gate dielectric layer and a gate electrode. The gate dielectric layer and the gate electrode may be vertically recessed selective to the dielectric gate spacer. A first anisotropic etch process recesses the gate electrode and the gate dielectric layer at about the same etch rate. A second anisotropic etch process with a higher selectivity may be subsequently used. Protruding remaining portions of the gate dielectric layer are minimized to reduce leakage current between adjacent transistors.
机译:可以通过在半导体板堆的中间部分围绕半导体板堆叠的牺牲栅极结构和介电栅极间隔物来提供门 - 全场场效应晶体管。 源区和漏区可以形成在半导体板叠层内的半导体板的端部上。 牺牲栅极结构和其他牺牲材料部分可以用栅极介电层和栅电极的组合代替。 栅极介电层和栅电极可以垂直凹陷选择性地介质栅极间隔物。 第一各向异性蚀刻工艺以大致相同的蚀刻速率置于栅电极和栅极电介质层。 随后可以使用具有更高选择性的第二各向异性蚀刻工艺。 突出的栅极介电层的剩余部分被最小化以减少相邻晶体管之间的漏电流。

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