首页> 外国专利> DIELECTRIC ETCH STOP LAYER FOR REACTIVE ION ETCH (RIE) LAG REDUCTION AND CHAMFER CORNER PROTECTION

DIELECTRIC ETCH STOP LAYER FOR REACTIVE ION ETCH (RIE) LAG REDUCTION AND CHAMFER CORNER PROTECTION

机译:用于反应离子蚀刻的介电蚀刻停止层(RIE)滞后和倒角保护

摘要

Stacked structures, process steps, and methods for via and trench formation use a dielectric etch stop layer (ESL) to reduce or eliminate problems, such as process lag and chamfer erosion, that occur during conventional etch processes. A stacked structure is formed that includes a dielectric ESL within a dielectric layer, such as a low-dielectric (low-K) layer, to form a first low-K layer below the dielectric ESL and a second low-K dielectric layer above the dielectric ESL. When the stacked structure is subsequently etched to form trenches as well as vias through the stacked structure to underlying layers, the dielectric ESL reduces or eliminates RIE lag by ensuring that trenches (regardless of width) stop on the dielectric ESL. The dielectric ESL also acts as a protective layer to protect corners from chamfer erosion during via and trench etch processes.
机译:通过和沟槽形成的堆叠结构,处理步骤和方法使用介质蚀刻停止层(ESL)来减少或消除在传统蚀刻工艺期间发生的诸如过程滞后和倒角侵蚀的问题。 形成堆叠结构,其包括在介电层内的电介质ESL,例如低介电(低k)层,以在电介质ESL和第二低k介电层下方形成第一低k层。 介电ESL。 当随后蚀刻堆叠结构以形成沟槽以及通过堆叠结构到下面的沟槽时,电介质ESL通过确保在电介质ESL上停止沟槽(无论宽度)停止,减少或消除RIE LAG。 电介质ESL还用作保护层,以在通孔和沟槽蚀刻工艺期间从倒角腐蚀保护角落。

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