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System and method for estimating junction temperatures of a power semiconductor module

机译:用于估计功率半导体模块的结温的系统和方法

摘要

A system for estimating junction temperatures of a power semiconductor module comprises a constant current source configured to apply a constant drain current to a drain terminal of a power semiconductor device of the power semiconductor module, an adjustable gate voltage source configured to provide a gate voltage signal to a To apply the gate terminal of the power semiconductor device, a drain-source voltage sensor coupled between the drain terminal and the source terminal, wherein the drain-source voltage sensor is configured to measure a value of the current drain-source voltage across the To measure power semiconductor device and output a corresponding drain-source voltage signal, a gate controller which is configured to determine a difference between the drain-source voltage signal and a constant reference voltage and the output of the adjustable gate voltage source as a function of the determined difference, and a system controller which is configured to switch the power semiconductor device into its fully conductive state if the deviations in the gate-source voltage over time remain within a tolerance band, and the junction temperature in the power semiconductor device as a function from the on-resistance of the power semiconductor device in the fully conductive state.
机译:用于估计功率半导体模块的结距的系统包括恒定电流源,该恒流源被配置为将恒流电流施加到功率半导体模块的功率半导体器件的漏极端子,可调节栅极电压源被配置为提供栅极电压信号为了应用功率半导体器件的栅极端子,耦合在漏极端子和源极端子之间的漏源电压传感器,其中漏极源电压传感器被配置为测量电流漏极源电压的值用于测量功率半导体器件并输出相应的漏极源电压信号,栅极控制器被配置为确定漏极源电压信号与恒定参考电压之间的差异以及可调栅极电压源的输出作为函数确定的差异,以及配置为切换功率半导体的系统控制器如果在栅极源电压随时间内的偏差保持在容差带内的偏差,并且功率半导体器件中的结温在完全导电中的电阻下的电阻下的功能状态。

著录项

  • 公开/公告号DE102020204771A1

    专利类型

  • 公开/公告日2021-10-21

    原文格式PDF

  • 申请/专利权人 AIRBUS S.A.S.;

    申请/专利号DE202010204771

  • 发明设计人 FLORIAN KAPAUN;GERHARD STEINER;

    申请日2020-04-15

  • 分类号G01R31/26;H01L21/66;

  • 国家 DE

  • 入库时间 2022-08-24 21:49:57

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