Digital Low Dropout Voltage Regulator using Single-VCO based Edge-Racing Time Quantizer

摘要

A digital low-dropout voltage regulator using a single VCO-based edge lacing time quantizer and a method of operation thereof are presented. The digital low-dropout voltage regulator using a single VCO-based edge lacing time quantizer proposed in the present invention includes an even number of a plurality of delay cells, of which half of the delay cells are controlled by a reference voltage, and the other half The delay cell of the SVER TQ (Single Voltage Controlled Oscillator based Edge-Racing Time Quantizer) that is controlled by the output voltage and outputs the racing result information by comparing the reference voltage and the output voltage, according to the racing result information input from SVER TQ _{M P} -control logic outputting a value for controlling coarse switching and fine switching, M _P - a plurality of unary arrays performing coarse switching according to a control value of the control logic and M _P - a plurality of binary array (binary array) to perform fine switching according to the control value of the control logic.