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IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration

召开年：2019
召开地：Cusco(PE)
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1.Preface

机译：前言
- 作者：Carolina Metzler;Pierre-Emmanuel Gaillardon;Giovanni De Micheli;Carlos Silva-Cardenas;Ricardo Reis
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
2.Software-Based Self-Test for Delay Faults

机译：基于软件的延迟故障自检
- 作者：Michelangelo Grosso;Matteo Sonza Reorda;Salvatore Rinaudo
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Software-Based Self-Test;
- Transition delay faults;
- Small Delay Defects;
- VLSI;
- Microcontrollers;
- Peripherals;
3.On Test Generation for Microprocessors for Extended Class of Functional Faults

机译：关于扩展功能故障类别的微处理器的测试生成
- 作者：Adeboye Stephen Oyeniran;Raimund Ubar;Maksim Jenihhin;Jaan Raik
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Microprocessor testing;
- High-level functional fault model;
- Test generation;
- High-level fault coverage;
4.Robust FinFET Schmitt Trigger Designs for Low Power Applications

机译：适用于低功耗应用的稳健FinFET施密特触发器设计
- 作者：Leonardo B. Moraes;Alexandra Lackmann Zimpeck;Cristina Meinhardt;Ricardo Reis
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Process variability mitigation;
- Schmitt Trigger;
- Low power;
- FinFET technology;
5.An Improved Technique for Logic Gate Susceptibility Evaluation of Single Event Transient Faults

机译：单事件暂态故障逻辑门磁化率评估的改进技术
- 作者：Rafael B. Schvittz;Denis T. Franco;Leomar S. da Rosa Jr.;Paulo F. Butzen
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Microelectronics;
- Reliability;
- Single Event Effects;
- Single event transient;
- Failure rate;
6.Process Variability Impact on the SET Response of FinFET Multi-level Design

机译：工艺差异对FinFET多级设计的SET响应的影响
- 作者：Leonardo H. Brendler;Alexandra L. Zimpeck;Cristina Meinhardt;Ricardo Reis
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- FinFET technology;
- Multi-level design;
- Process variability;
- Soft errors;
- Single Event Transient;
7.Efficient Soft Error Vulnerability Analysis Using Non-intrusive Fault Injection Techniques

机译：使用非侵入式故障注入技术的高效软错误漏洞分析
- 作者：Vitor Bandeira;Felipe Rosa;Ricardo Reis;Luciano Ost
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
8.A Statistical Wafer Scale Error and Redundancy Analysis Simulator

机译：统计晶圆规模误差和冗余分析模拟器
- 作者：Atishay;Ankit Gupta;Rashmi Sonawat;Helik Kanti Thacker;B. Prasanth
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Redundancy analysis algorithm;
- Defect simulation;
- Error analysis;
- Statistical modeling;
- Wafer simulation;
9.Hardware-Enabled Secure Firmware Updates in Embedded Systems

机译：嵌入式系统中启用硬件的安全固件更新
- 作者：Solon Falas;Charalambos Konstantinou;Maria K. Michael
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Embedded systems;
- Firmware updates;
- Hardware security;
10.Reliability Enhanced Digital Low-Dropout Regulator with Improved Transient Performance

机译：具有更高瞬态性能的可靠性增强型数字低压降稳压器
- 作者：Longfei Wang;Soner Seckiner;Selcuk Koese
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- NBTI;
- Reliability;
- Aging;
- Steady state performance -Transient performance;
- Shift register;
- Unidirectional control;
11.Security Aspects of Real-Time MPSoCs: The Flaws and Opportunities of Preemptive NoCs

机译：实时MPSoC的安全性：抢先式NoC的缺陷和机遇
- 作者：Bruno Forlin;Cezar Reinbrecht;Johanna Sepulveda
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Network-on-Chip;
- Secure MPSoC;
- Timing side-channel attacks;
12.Offset-Compensation Systems for Multi-Gbit/s Optical Receivers

机译：多千兆位光接收器的失调补偿系统
- 作者：Laszlo Szilagyi;Jan Pliva;Ronny Henker
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
13.Accelerating Inference on Binary Neural Networks with Digital RRAM Processing

机译：利用数字RRAM处理加速对二值神经网络的推断
- 作者：Joao Vieira;Edouard Giacomin;Yasir Qureshi;Marina Zapater;Xifan Tang;Shahar Kvatinsky;David Atienza;Pierre-Emmanuel Gaillardon
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Machine Learning;
- Embedded systems;
- Binary Neural Networks;
- RRAM-based Binary Dot Product Engine;
14.Semi- and Fully-Random Access LUTs for Smooth Functions

机译：半和完全随机访问LUT，实现平滑功能
- 作者：Y. Serhan Gener;Furkan Aydin;Sezer Goeren;H. Fatih Ugurdag
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
15.A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors

机译：三独立门场效应晶体管的预测过程设计套件
- 作者：Patsy Cadareanu;Ganesh Gore;Edouard Giacomin;Pierre-Emmanuel Gaillardon
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
16.Exploiting Heterogeneous Mobile Architectures Through a Unified Runtime Framework

机译：通过统一的运行时框架开发异构移动体系结构
- 作者：Chenying Hsieh;Ardalan Amiri Sani;Nikil Dutt
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
17.A 65 nm CMOS Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion with 99.6 Current Efficiency at 10-mA Load

机译：基于电压与时间转换的65nm CMOS合成的数字低压丢失调节器，10 mA负载下电流效率为99.6％
- 作者：Naoki Ojima;Toru Nakura;Tetsuya Iizuka;Kunihiro Asada
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- digital;
- LDO;
- implemented;
18.The Connection Layout in a Lattice of Four-Terminal Switches

机译：四端开关格的连接布局
- 作者：Anna Bernasconi;Antonio Boffa;Fabrizio Luccio;Linda Pagli
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Circuit layout;
- Switching lattices;
- Logic synthesis;
- Hard problems;
- Heuristics;
19.Optimizing Performance and Energy Overheads Due to Fanout in In-Memory Computing Systems

机译：在内存计算系统中优化由于扇出导致的性能和能量开销
- 作者：Md Adnan Zaman;Rajeev Joshi;Srinivas Katkoori
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Memristor;
- In-memory computing;
- Fanout;
- MAGIC;
- Crossbar;
- Logic synthesis;
- Resistive memory;
20.An Instruction Set Architecture for Secure, Low-Power, Dynamic IoT Communication

机译：一种用于安全，低功耗，动态IOT通信的指令集架构
- 作者：Shahzad Muzaffar;Ibrahim (Abe) M. Elfadel
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
21.Rectification of Arithmetic Circuits with Craig Interpolants in Finite Fields

机译：有限字段中克雷格嵌段算术电路的整改
- 作者：Utkarsh Gupta;Irina Ilioaea;Vikas Rao;Arpitha Srinath;Priyank Kalla;Florian Enescu
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Rectification;
- Arithmetic circuits;
- Gr?bner bases;
- Craig interpolants;
22.Analysis of Bridge Defects in STT-MRAM Cells Under Process Variations and a Robust DFT Technique for Their Detection

机译：流程变化下STT-MRAM细胞桥梁缺陷分析及其检测鲁棒DFT技术
- 作者：Victor Champac;Andres Gomez;Freddy Forero;Kaushik Roy
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- STT-MRAM;
- Short defect;
- Test;
- Design-For-Test;
- FinFET;
23.Assessment of Low-Budget Targeted Cyberattacks Against Power Systems

机译：对电力系统的低预算有针对性的网络攻击评估
- 作者：XiaoRui Liu;Anastasis Keliris;Charalambos Konstantinou;Marios Sazos;Michail Maniatakos
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- societies;
- economies;
- tied;
24.ReRAM Based In-Memory Computation of Single Bit Error Correcting BCH Code

机译：基于RERAM的单点错误校正BCH码的内存计算
- 作者：Swagata Mandal;Yaswanth Tavva;Debjyoti Bhattacharjee;Anupam Chattopadhyay
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Error correcting code;
- BCH code;
- In memory computing;
- ReRAM;
25.Improved Test Solutions for COTS-Based Systems in Space Applications

机译：改进的空间应用中的基于婴儿床的系统测试解决方案
- 作者：Riccardo Cantoro;Sara Carbonara;Andrea Floridia;Ernesto Sanchez;Matteo Sonza Reorda;Jan-Gerd Mess
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- structural;
- test;
- approaches;
26.Mapping Spiking Neural Networks on Multi-core Neuromorphic Platforms: Problem Formulation and Performance Analysis

机译：映射尖峰神经网络对多核神经形态平台：问题配方和性能分析
- 作者：Francesco Barchi;Gianvito Urgese;Enrico Macii;Andrea Acquaviva
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Graph mapping;
- Multicore neuromorphic architectures;
- Spiking neural networks;
27.Energy-Accuracy Scalable Deep Convolutional Neural Networks: A Pareto Analysis

机译：能量准确度可扩展的深度卷积神经网络：帕累托分析
- 作者：Valentino Peluso;Andrea Calimera
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- optimization;
- Deep;
- Convolutional;
28.Building High-Performance, Easy-to-Use Polymorphic Parallel Memories with HLS

机译：用HLS建立高性能，易于使用的多态并联存储器
- 作者：L. Stornaiuolo;M. Rabozzi;M. D. Santambrogio;D. Sciuto;C. B. Ciobanu;G. Stramondo;A. L. Varbanescu
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Polymorphic Parallel Memory;
- High-Level Synthesis;
- FPGA;
29.Efficient Hardware/Software Co-design for NTRU

机译：高效的硬件/软件共同设计
- 作者：Tim Fritzmann;Thomas Schamberger;Christoph Frisch;Konstantin Braun;Georg Maringer;Johanna Sepúlveda
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2019年
- Lattice-based cryptography;
- NTRU;
- HW/SW co-design;
- Side-Channel Attack;
30.Mixed-Mode Signal Processing for Implementing MCMC MIMO Detector

机译：实现MCMC MIMO检测器的混合模式信号处理
- 作者：Amin Aghighi;Behrouz Farhang-Boroujeny;Armin Tajalli
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- Optimal detectors;
- sub-optimal detectors;
- Markov Chain Monte Carlo (MCMC);
- VLSI MIMO;
- Mixed-mode MIMO;
- Mixed-mode circuits;
31.From Informal Specifications to an ABV Framework for Industrial Firmware Verification

机译：从非正式规范到用于工业固件验证的ABV框架
- 作者：Samuele Germiniani;Moreno Bragaglio;Graziano Pravadelli
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- verification;
- testing;
- simulation;
- checker;
- PSL;
- LTL;
- specification;
32.SANSCrypt: Sporadic-Authentication-Based Sequential Logic Encryption

机译：SANSCrypt：基于零星身份验证的顺序逻辑加密
- 作者：Yinghua Hu;Kaixin Yang;Shahin Nazarian;Pierluigi Nuzzo
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- Hardware Security;
- Sequential Encryption;
- Sporadic Authentication;
33.Low-Power High-Speed ADCs for ADC-Based Wireline Receivers in 22 nm FDSOI

机译：用于22 nm FDSOI中基于ADC的有线接收机的低功耗高速ADC
- 作者：David Cordova;Wim Cops;Yann Deval;Francois Rivet;Herve Lapuyade;Nicolas Nodenot;Yohan Piccin
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- Analog-to-digital converter (ADC);
- low power;
- single channel;
- successive approximation register (SAR);
34.Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation

机译：使用可定制的基于单元的模拟和混合信号电路生成的完全自主SoC合成
- 作者：Tutu Ajayi;Sumanth Kamineni;Morteza Fayazi;Yaswanth K. Cherivirala;Kyumin Kwon;Shourya Gupta;Wenbo Duan;Jeongsup Lee;Chien-Hen Chen;Mehdi Saligane;Dennis Sylvester;David Blaauw;Ronald Dreslinski Jr;Benton Calhoun;David D. Wentzloff
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- analog synthesis;
- analog generator;
- SoC generator;
35.3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model

机译：基于垂直NWFET技术的3D逻辑单元设计和结果，包括捆绑紧凑模型
- 作者：Arnaud Poittevin;Chhandak Mukherjee;Ian OConnor;Cristell Maneux;Guilhem Larrieu;Marina Deng;Sebastien Le Beux;Francois Marc;Aurelie Lecestre;Cedric Marchand;Abhishek Kumar
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- Vertical NWFET technology;
- compact model;
- VNWFET DC measurements;
- 3D logic circuit cell;
- circuit simulation results;
36.Statistical Array Allocation and Partitioning for Compute In-Memory Fabrics

机译：内存计算结构的统计数组分配和分区
- 作者：Brian Crafton;Samuel Spetalnick;Gauthaman Murali;Tushar Krishna;Sung-Kyu Lim;Arijit Raychowdhury
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- Compute In-Memory;
- RRAM;
- PCRAM;
37.Low Power Current-Mode Relaxation Oscillators for Temperature and Supply Voltage Monitoring

机译：用于温度和电源电压监测的低功率电流模式松弛振荡器
- 作者：Shanshan Dai;Caleb R. Tulloss;Xiaoyu Lian;Kangping Hu;Sherief Reda;Jacob K. Rosenstein
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- relaxation oscillator;
- low power;
- temperature sensor;
- supply voltage sensor;
38.Learning Based Timing Closure on Relative Timed Design

机译：基于相对计时设计的学习计时闭合
- 作者：Tannu Sharma;Sumanth Kolluru;Kenneth S. Stevens
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- relative timing;
- timing closure;
- heuristic;
- greedy;
- machine learning;
- gradient descent;
- boosting;
- regression;
- EDA;
39.RAT: A Lightweight Architecture Independent System-Level Soft Error Mitigation Technique

机译：RAT：一种轻量级独立于体系结构的系统级软错误缓解技术
- 作者：Jonas Gava;Ricardo Reis;Luciano Ost
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- Multicore;
- Soft error reliability;
- Mitigation technique;
- Fault tolerance;
40.abstractPIM: A Technology Backward-Compatible Compilation Flow for Processing-In-Memory

机译：abstractPIM：一种面向内存处理的向后兼容编译流技术
- 作者：Adi Eliahu;Rotem Ben-Hur;Ronny Ronen;Shahar Kvatinsky
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- Memristor;
- processing-in-memory;
- RRAM;
- stateful logic;
- ISA;
41.Assessing the Configuration Space of the Open Source NVDLA Deep Learning Accelerator on a Mainstream MPSoC Platform

机译：在主流MPSoC平台上评估开源NVDLA深度学习加速器的配置空间
- 作者：Alessandro Veronesi;Davide Bertozzi;Milos Krstic
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- Deep-Learning;
- Reconfigurable Logic;
- Bare-Metal Software;
- Open Hardware;
- Configurable Accelerator;
42.SAT-Based Mapping of Data-Flow Graphs onto Coarse-Grained Reconfigurable Arrays

机译：基于SAT的数据流图到粗粒度可重构阵列的映射
- 作者：Yukio Miyasaka;Masahiro Fujita;Alan Mishchenko;John Wawrzynek
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- SAT problem;
- mapping;
- data-flow graph;
- CGRA;
43.Modular Functional Testing: Targeting the Small Embedded Memories in GPUs

机译：模块化功能测试：针对GPU中的小型嵌入式内存
- 作者：Josie Esteban Rodriguez Condia;Matteo Sonza Reorda
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
44.3D Nanofabric: Layout Challenges and Solutions for Ultra-scaled Logic Designs

机译：3D纳米织物：超大规模逻辑设计的布局挑战和解决方案
- 作者：Edouard Giacomin;Juergen Boemmels;Julien Ryckaert;Francky Catthoor;Pierre-Emmanuel Gaillardon
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- 3D Logic Integration;
- Nanotechnologies;
- Emerging Technologies;
- Layout;
45.Preface

机译：前言
- 作者：Andrea Calimera;Pierre-Emmanuel Gaillardon;Kunal Korgaonkar;Shahar Kvatinsky;Ricardo Reis
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
46.Multilevel Signaling for High-Speed Chiplet-to-Chiplet Communication

机译：用于高速芯片间通信的多级信令
- 作者：Rakshith Saligram;Ankit Kau;Muhannad S. Bakir;Arijit Raychowdhury
- 会议名称：《IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration》 | 2020年
- Heterogeneous Integration;
- Coplanar Microstrip;
- NRZ;
- PAM4;
- Channel Operating Margin;