首页> 外国专利> METHODS FOR MANUFACTURING NON-PLANAR SEMICONDUCTOR DEVICES HAVING GERMANIUM-BASED ACTIVE REGIONS WITH A COMBINED RELEASE-ETCH PASSIVATION STEP.

METHODS FOR MANUFACTURING NON-PLANAR SEMICONDUCTOR DEVICES HAVING GERMANIUM-BASED ACTIVE REGIONS WITH A COMBINED RELEASE-ETCH PASSIVATION STEP.

机译:用于制造具有基于锗基有源区的非平面半导体器件,其中具有组合的释放蚀刻钝化步骤。

摘要

Non-planar semiconductor devices having germanium-based active regions with release etch-passivation surfaces are described. For example, a semiconductor device includes a vertical arrangement of a plurality of germanium-rich nanowires disposed above a substrate. Each nanowire includes a channel region having a sulfur-passivated outer surface. A gate stack is disposed on and completely surrounds the channel region of each of the germanium-rich nanowires. The gate stack includes a gate dielectric layer disposed on and surrounding the sulfur-passivated outer surface and a gate electrode disposed on the gate dielectric layer. Source and drain regions are disposed on either side of the channel regions of the germanium-rich nanowires.
机译:描述了具有具有释放蚀刻钝化表面的基于锗的有源区的非平面半导体器件。例如,半导体器件包括设置在基板上方的多个富锗的纳米线的垂直布置。每个纳米线包括具有硫钝化外表面的沟道区。栅极堆叠设置在并完全围绕富锗纳米线的沟道区。栅极堆叠包括设置在硫钝的外表面上的栅极介电层和设置在栅极介电层上的栅电极。源极和漏极区域设置在富锗纳米线的沟道区域的两侧。

著录项

  • 公开/公告号EP2901488B1

    专利类型

  • 公开/公告日2021-07-21

    原文格式PDF

  • 申请/专利权人

    申请/专利号EP20130842457

  • 申请日2013-06-10

  • 分类号H01L21/336;H01L29/775;H01L29/06;H01L29/78;H01L29/423;B82Y10;

  • 国家 EP

  • 入库时间 2022-08-24 20:02:53

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