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Equi-resistant probe distribution for high-accuracy voltage measurements at the wafer level

机译:晶圆级高精度电压测量的平等耐电压分布

摘要

A test system and test techniques for accurate high-current parametric testing of semiconductor devices. In operation, the test system supplies a current to the semiconductor device and measures a voltage on the device. The testing system may use the measured voltage to compute an ON resistance for the high-current semiconductor device. In one technique, multiple force needles contact a pad in positions that provide equi-resistant paths to one or more sense needles contacting the same pad. In another technique, current flow through the force needles is regulated such that voltage at the pad of the device under test is representative of the ON resistance of the device and independent of contact resistance of the force needle. Another technique entails generating an alarm indication when the contact resistance of a force needle exceeds a threshold.
机译:一种用于精确高电流参数测试的测试系统和测试技术。在操作中,测试系统向半导体器件提供电流并测量设备上的电压。测试系统可以使用测量的电压来计算高电流半导体器件的电阻。在一种技术中,多个力针与焊盘接触,该位置处于与接触相同垫的一个或多个感知针头提供平等的路径。在另一种技术中,调节通过力针的电流流动使得在被测装置的垫处的电压代表装置的电阻,并且与力针的接触电阻无关。当力针的接触电阻超过阈值时,另一种技术需要产生警报指示。

著录项

  • 公开/公告号US11041900B2

    专利类型

  • 公开/公告日2021-06-22

    原文格式PDF

  • 申请/专利权人 TERADYNE INC.;

    申请/专利号US201414225918

  • 发明设计人 JACK E. WEIMER;

    申请日2014-03-26

  • 分类号G01R1/04;G01R31/26;

  • 国家 US

  • 入库时间 2022-08-24 19:28:48

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