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Testing circuit, testing method, and apparatus for testing multi-port random access memory
Testing circuit, testing method, and apparatus for testing multi-port random access memory
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机译:测试电路,测试方法和用于测试多端口随机存取存储器的装置
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摘要
A testing circuit for testing a multi-port random access memory includes an input circuit, a first port testing circuit and a second port testing circuit. The input circuit receives a testing clock signal and a test mode enable signal and is configured to provide the testing clock signal according to the test mode enable signal. The first port testing circuit is coupled to the input circuit, and is configured to output a first word line enable signal for a first port of the multi-port random access memory according to the testing clock signal and a first delay signal. The second port testing circuit is coupled to the input circuit, and is configured to output a second word line enable signal for a second port of the multi-port random access memory according to the testing clock signal and a second delay signal. The first word line enable signal and the second word line enable signal are asserted at the same time, and the first word line enable signal is de-asserted before the second word line enable signal. A method adapted for a testing circuit and an apparatus including a device under test and a testing circuit are also introduced.
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