首页> 外国专利> MEMORY UNIT FOR MULTI-BIT CONVOLUTIONAL NEURAL NETWORK BASED COMPUTING-IN-MEMORY APPLICATIONS, MEMORY ARRAY STRUCTURE FOR MULTI-BIT CONVOLUTIONAL NEURAL NETWORK BASED COMPUTING-IN-MEMORY APPLICATIONS AND COMPUTING METHOD THEREOF

MEMORY UNIT FOR MULTI-BIT CONVOLUTIONAL NEURAL NETWORK BASED COMPUTING-IN-MEMORY APPLICATIONS, MEMORY ARRAY STRUCTURE FOR MULTI-BIT CONVOLUTIONAL NEURAL NETWORK BASED COMPUTING-IN-MEMORY APPLICATIONS AND COMPUTING METHOD THEREOF

机译:基于多比特卷积神经网络的存储单元的存储单元,基于多位卷积神经网络的基于存储的存储器的存储器阵列结构及其计算方法

摘要

A memory unit is controlled by a first word line and a second word line. The memory unit includes a memory cell and a transpose cell. The memory cell stores a weight. The memory cell is controlled by the first word line and includes a local bit line transmitting the weight. The transpose cell is connected to the memory cell and receives the weight via the local bit line. The transpose cell includes an input bit line, an input bit line bar, an output bit line and an output bit line bar. Each of the input bit line and the input bit line bar transmits a multi-bit input value, and the transpose cell is controlled by the second word line to generate a multi-bit output value on each of the output bit line and the output bit line bar according to the multi-bit input value and the weight.
机译:存储单元由第一字线和第二字线控制。存储器单元包括存储器单元和转置小区。存储器单元存储权重。存储器单元由第一字线控制,并包括发送权重的局部位线。转置电池连接到存储器单元并通过局部位线接收权重。转置单元包括输入位线,输入位线条,输出位线和输出位线条。每个输入位线和输入位线条发送多位输入值,并且转置小区由第二字线控制,以在每个输出位线和输出位上生成多位输出值线条根据多位输入值和重量。

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