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SiC power semiconductor device with integrated Schottky junction

机译:具有集成肖特基交界处的SIC功率半导体器件

摘要

Embodiments of SiC devices and corresponding methods of manufacture are provided. In some embodiments, the SiC device has shielding regions at the bottom of some gate trenches and non-linear junctions formed with the SiC material at the bottom of other gate trenches. In other embodiments, the SiC device has the shielding regions at the bottom of the gate trenches and arranged in rows which run in a direction transverse to a lengthwise extension of the trenches. In still other embodiments, the SiC device has the shielding regions and the non-linear junctions, and wherein the shielding regions are arranged in rows which run in a direction transverse to a lengthwise extension of the trenches.
机译:提供了SiC器件的实施例和相应的制造方法。在一些实施例中,SiC器件在一些栅极沟槽的底部具有屏蔽区域和在其他栅极沟槽底部的SiC材料形成的非线性结。在其他实施例中,SiC器件在栅极沟槽的底部具有屏蔽区域,并以沿横向于沟槽的纵向延伸的方向运行的行布置。在其他实施例中,SiC器件具有屏蔽区域和非线性结,并且其中屏蔽区域以沿横向于沟槽的纵向延伸的方向运行的行排列。

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