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Integrated capacitor with sidewall having reduced roughness

机译:集成电容,侧壁具有降低的粗糙度

摘要

A method of forming an integrated capacitor on a semiconductor surface on a substrate includes etching a capacitor dielectric layer including at least one silicon compound material layer on a bottom plate which is above and electrically isolated from the semiconductor surface to provide at least one defined dielectric feature having sloped dielectric sidewall portion. A dielectric layer is deposited to at least partially fill pits in the sloped dielectric sidewall portion to smooth a surface of the sloped dielectric sidewall portion. The dielectric layer is etched, and a top plate is then formed on top of the dielectric feature.
机译:一种在基板上形成集成电容的方法包括蚀刻在底板上的至少一个硅化合物材料层上方的电容器介电层,其与半导体表面电隔离,以提供至少一个限定的电介质特征具有倾斜的介电侧壁部分。介电层沉积到倾斜介电侧壁部分中的至少部分地填充凹坑,以平滑倾斜介电侧壁部分的表面。蚀刻介电层,然后在介电特征的顶部形成顶板。

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