In order to receive a plurality of input feature map (IFM) microbatch from a pixel memory, receive a plurality of kernel microbatch from kernel memory 122, and obtain a plurality of output feature map (OFM) microbatch, The plurality of input feature map micro-batch and the plurality of kernel micro-batch while reusing the plurality of kernel micro-batch based on a kernel reuse factor for at least one of direct convolution (DConv) and Winograd convolution (WgConv) A convolutional neural network accelerator architecture for multiplying by and recording the result of multiplying the plurality of input feature map micro-batch and the plurality of kernel micro-batch in the pixel memory for quantization, non-linear function, and output feature map micro-batch generated after pooling. It relates to a hybrid traversal apparatus and method for.
展开▼
