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Evaluation method of SiC substrate, manufacturing method of SiC epitaxial wafer and manufacturing method of SiC device

机译:SiC基板的评价方法,SiC外延晶片制造方法及SiC器件的制造方法

摘要

PROBLEM TO BE SOLVED: To provide an evaluation method of a SiC substrate capable of efficiently identifying penetration defects existing in a SiC substrate at low cost. SOLUTION: In this method of evaluating a SiC substrate, a preparatory step of preparing two or more SiC wafers from a SiC wafer grown from the same seed crystal and a main surface of each of the two or more SiC wafers are observed. It has a defect position identification step for identifying the position of a defect and a comparison step for comparing the positions of defects on two or more SiC substrates, and in the preparation step, it is the closest to the seed crystal among the two or more SiC substrates. The SiC substrate located in the above was used as the reference wafer, and in the comparison process, the defect of the reference wafer and the defect of the SiC substrate other than the reference wafer were compared, and the two defects compared were the defects in the [11-20] direction. If the distance is 0.6 mm or more, it is determined that the defect is not associated with the same penetration defect, and if it is less than 0.2 mm, it is determined that the two compared defects are defects associated with the same penetration defect. [Selection diagram] Fig. 1
机译:要解决的问题:提供一种SiC基板的评估方法,其能够以低成本有效地识别在SiC基板中存在的穿透缺陷。解决方案:在评估SiC衬底的方法中,观察到从来自相同晶种生长的SiC晶片和从同一种子晶体生长的SiC晶片和每个或更多个SiC晶片的主表面制备两个或更多个SiC晶片的准备步骤。它具有缺陷位置识别步骤,用于识别缺陷的位置和用于比较两个或更多个SiC基板上的缺陷位置的比较步骤,并且在制备步骤中,它是两种或更多种之间最接近的种子晶体SiC基材。位于上述的SiC基板用作参考晶片,并且在比较过程中,比较了参考晶片的缺陷和除了参考晶片之外的SiC基板的缺陷,并且比较的两种缺陷是缺陷[11-20]方向。如果距离为0.6mm以上,则确定缺陷与相同的穿透缺陷无关,并且如果它小于0.2mm,则确定两个比较的缺陷是与相同穿透缺陷相关的缺陷。 [选择图]图1

著录项

  • 公开/公告号JP2021040004A

    专利类型

  • 公开/公告日2021-03-11

    原文格式PDF

  • 申请/专利权人 昭和電工株式会社;

    申请/专利号JP20190159584

  • 发明设计人 郭 玲;

    申请日2019-09-02

  • 分类号H01L21/66;C30B29/36;

  • 国家 JP

  • 入库时间 2022-08-24 17:40:01

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