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order for the representation of the logical function íÀundí with a voltage supply for effective light source and a photosensitive element

机译:用有效光源的电压源和光敏元件表示逻辑功能“与”的顺序

摘要

977,404. Digital electric calculating. INTERNATIONAL BUSINESS MACHINES CORPORATION. Nov. 2,1961 [Nov.29, 1960], No. 39211/ 61. Heading G4A. A decimal adder includes and gates each comprising a neon 26 and a photoconductive strip 30. If the neon 26 is lit by a voltage on the O terminal of the Y input, the impedance of strip 30 decreases and a high voltage at the O terminal of the X input will result in a high voltage on line 38. Fig. 2 shows the principle of construction of the decimal adder:one terminal from each of the X and Y inputs is marked with the result that one out of the three lines 38 to 42 is marked. The decimal embodiment is described with reference to Figs. 3 to 7 (not shown) and 8, and has 11 X-inputs and 10 Y-inputs; marking one from each set of inputs marks one out of twenty output lines. A trigger 110 (Fig. 8) operated by a timer 82 controls gates 102,104, 106,108: when the trigger is set, gates 104 and 106 are open, when unset, gates 102,108 are open. A signal on any of the adder output lines representing digits 0-9 marks line 74, on any of the lines representing numbers 10-19 marks line 72. Flipflop 98,100 are switched at alternate time intervals and in the intervening interval the setting of a flip-flop is gated to mark one of the in-carry or borrow lines 62,64 &c. Which line is marked depends on which of the true or complement neons 110,112 is lit, and this in turn depends the type of operation as indicated by the setting of switches 120,122, the signs of the operands entered on lines 116,118 and the relative magnitude of the numbers entered on switch 126. The sign of the result is indicated on lines 124-switch 127 must be appropriately set. An inverse operation can be called for by operating the modify switch 126. This switch must be closed before an add or subtract switch otherwise an error lamp 148 is lit.
机译:977,404。数字电计算。国际商业机器公司。 1961年11月2日(1960年11月29日),编号39211 /61。标题G4A。十进制加法器包括一个和一个门,每个门包括一个霓虹灯26和一个光电导带30。如果霓虹灯26被Y输入的O端子上的电压点亮,则带30的阻抗会降低,并且O的O端子上的高压X输入将在线38上产生高电压。图2显示了十进制加法器的构造原理:X和Y输入中的每个端子都标有一个端子,结果是三根线38中的一根标记为42。参照图10至图10描述十进制实施例。 3至7(未示出)和8具有11个X输入和10个Y输入。从每组输入中标记一个,则标记二十个输出线中的一个。由计时器82操作的触发器110(图8)控制门102,104,106,108:当设置触发器时,门104和106打开,当未设置时,门102,108打开。在代表数字0-9标记线74的任何加法器输出线上的信号,在代表数字10-19标记线72的任何线上的信号。触发器98,100以交替的时间间隔切换,并在其间的间隔中设置触发器的设置触发器被门控以标记进位或借位线62,64&c之一。标记哪条线取决于霓虹灯110,112点亮的是真霓虹灯还是互补霓虹灯,这又取决于由开关120,122的设置指示的操作类型,在行116,118上输入的操作数的符号以及相应的幅度。在开关126上输入数字。结果的符号在第124行-开关127上指示,必须适当设置。可以通过操作修改开关126要求进行反向操作。必须在加法或减法开关闭合之前关闭此开关,否则错误指示灯148会亮起。

著录项

  • 公开/公告号DE000001152727A

    专利类型

  • 公开/公告日1963-08-14

    原文格式PDF

  • 申请/专利权人 IBM;

    申请/专利号DEJ0020862A

  • 发明设计人 RICE REX;

    申请日1961-11-21

  • 分类号

  • 国家 DE

  • 入库时间 2022-08-23 17:11:55

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