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Semiconductor Monolithic Microcircuits.

机译:半导体单片微电路。

摘要

1,165,029. Semi-conductor devices; resistors. RADIO CORPORATION OF AMERICA. 29 Nov., 1966 [2 Dec., 1965], No. 53493/66. Headings H1K and H1S; In a monolithic semi-conductor microcircuit a P(N) type region 8, e.g. comprising a resistor, is surrounded by a portion of an N(P) type region 6 isolated laterally from the remainder of the crystal by a P(N) type zone 10. An N+(P+) zone 12 is provided between the isolated portion of the region 6 and the zone 10, at least partially separating the two, and thereby minimizing the detrimental effect of the parasitic PNP(NPN) transistor formed by the regions 8, 6 and the zone 10. In the form shown, the region 6 is epitaxially deposited on a highly antimony- or arsenic-doped N + epitaxial layer 4 on a boron-doped P-type silicon substrate 2. Using an oxide masking and photoresist technique a rectangular annular layer of BBr 3 is vapour deposited on the surface in preparation for formation of the isolation zone 10, and a similar layer of, e.g. POCl 3 is vapour deposited prior to formation of the zone 12. Subsequent heating at 1165‹ C. causes the impurities to diffuse in, partly forming the zones 10, 12. Boron nitride is deposited on the surface, through a suitable oxide mask, and boron is diffused in at 1100‹ C. to form the region 8, this heating stage causing the further diffusion required to complete the zones 10, 12. Metal contacts 28 are then applied through an insulated oxide coating 26. In an alternative embodiment, the substrate 2 is also of N-type conductivity, and in this case the isolation zones 10, 12 extend throughout the wafer thickness. The highly doped N + type region 4 need not extend throughout the crystal, and may instead comprise a pocket diffused into the substrate 2. If the N-type layer 6 is sufficiently thick the N+ type layer 4 may be dispensed with entirely. The resistor described may be included in a monolithic circuit comprising diodes, transistors, capacitors &c.
机译:1,165,029。半导体器件;电阻器。美国无线电公司。 1966年11月29日[1965年12月2日],编号53493/66。标题H1K和H1S;在单片半导体微电路中,P(N)型区域8例如为P。 N(P)型区域6的一部分被N(P)型区域6的一部分包围,该部分与晶体的其余部分通过P(N)型区域10横向隔离。N+(P +)区域12设置在N(P)型区域的隔离部分之间。区域6和区域10,至少部分地将两者分开,从而使由区域8、6和区域10形成的寄生PNP(NPN)晶体管的有害影响最小化。在所示的形式中,区域6是外延沉积在硼掺杂的P型硅衬底2上的高度掺杂锑或砷的N +外延层4上。使用氧化物掩膜和光致抗蚀剂技术,在制备过程中将BBr 3的矩形环状层气相沉积在表面上用于形成隔离区10和类似的层,例如POCl 3在形成区域12之前先进行气相沉积。随后在1165°C加热,杂质扩散进来,部分形成区域10、12。氮化硼通过合适的氧化物掩模沉积在表面上,硼在1100℃下扩散形成区域8,该加热阶段引起完成区域10、12所需的进一步扩散。然后通过绝缘氧化物涂层26施加金属触点28。衬底2也具有N型导电性,并且在这种情况下,隔离区10、12在整个晶片厚度上延伸。高掺杂的N +型区域4不必延伸到整个晶体,而是可以包括扩散到衬底2中的袋。如果N型层6足够厚,则可以完全省去N +型层4。所描述的电阻器可以包括在包括二极管,晶体管,电容器&c的单片电路中。

著录项

  • 公开/公告号GB1165029A

    专利类型

  • 公开/公告日1969-09-24

    原文格式PDF

  • 申请/专利权人 RADIO CORPORATION OF AMERICA;

    申请/专利号GB19660053493

  • 发明设计人

    申请日1966-11-29

  • 分类号H01L21/761;H01L29/06;H01L29/8605;

  • 国家 GB

  • 入库时间 2022-08-23 11:49:30

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