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High frequency ion implanted passivated semiconductor devices and mircowave intergrated circuits and planar processes for fabricating both

机译:高频离子注入钝化半导体器件和微波集成电路,以及用于制造两者的平面工艺

摘要

The specification describes new high frequency ion implanted semiconductor devices, novel microwave integrated circuits employing same, and a planar fabrication process for both wherein initially an ion implantation and PN junction passivation mask is formed on one surface of a semiconductor substrate. Next a heavily doped buried region is ion implanted through an opening in the mask and into the substrate to a preselected controlled depth. Thereafter, one or more additional ion implants are made through the mask opening to complete the active device regions and a PN junction therebetween, all of which are bounded by an annular, higher resistivity unimplanted region of the semiconductor substrate. The PN junction thus formed terminates beneath the implantation and passivation mask, and the semiconductor substrate is then annealed to remove ion implantation damage and to electrically activate the ion implanted regions, while simultaneously controlling the lateral movement of the PN junction beneath the passivation mask. Such annealing does not adversely affect the conductivity and passivation characteristics of either the higher resistivity region or the passivation mask. Openings to the heavily doped buried regions in the substrate are made both opposite and coaxial to the openings in the passivation mask. Precision in the area and depth of these contact openings is achieved by use of a chemical etchant that is preferential to the substrate crystallographic orientation and the impurity concentration levels. Ohmic contact metallization is deposited into the contact openings after which the heat sink metallization is applied to either or both of the metallized contact regions.
机译:该说明书描述了新的高频离子注入半导体器件,采用该器件的新型微波集成电路以及用于两者的平面制造工艺,其中最初在半导体衬底的一个表面上形成离子注入和PN结钝化掩模。接下来,通过掩模中的开口将重掺杂的掩埋区离子注入到衬底中至预定的受控深度。此后,通过掩模开口进行一个或多个附加的离子注入,以完成有源器件区域和它们之间的PN结,所有这些都被半导体衬底的环形,高电阻率未注入区域限制。这样形成的PN结终止于注入和钝化掩模的下方,然后对半导体衬底进行退火以去除离子注入损伤并电激活离子注入区域,同时控制钝化掩模下方的PN结的横向运动。这种退火不会对较高电阻率区域或钝化掩模的导电性和钝化特性产生不利影响。使衬底中重掺杂掩埋区的开口与钝化掩模中的开口相对且同轴。这些接触孔的面积和深度的精确度是通过使用优先于衬底晶体学取向和杂质浓度水平的化学蚀刻剂来实现的。欧姆接触金属化层沉积到接触孔中,然后将散热器金属化层施加到两个金属化接触区中的一个或两个上。

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