De-multiplexer with clock generator - uses clock frequency of time multiplexed signal to derive clocking for synchronisation circuit

摘要

The demultiplexer has a clock generator whose faster part derives a clock frequency for the first part of a synchronisation circuit and a clock frequency for the same synchronisation circuit, for the channel parts and for the slower part of the clock generator. Both these two clock frequencies are derived by the faster part from the time multiplexed signal's clock frequency. The first part of the synchronisation circuit - on receipt of a frame recognition pulse at its second part and at the faster part of the clock generator - releases a reset pulse.