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MULTIPLEX PARALLELLSERIAL CONVERSION SYSTEM USING MEMORY

机译:利用存储器的多路并行并行转换系统

摘要

PURPOSE:To carry out a collective parallel-serial conversion process for a number of circuits by reading the parallel data of the circuits supplied into the memory based on a fixed rule and then converting the data into the information of the parallel circuit and the serial data to secure a collective parallel-serial conversion for a number of circuits. CONSTITUTION:The signals of data writing means 21-1 and 21-2 which write the data given from outside in series into each circuit parallel bit are supplied for writing to either one of two pairs of memories 22-1 and 22-2. And the data written into the other side of the two pairs of the memories is read out through data reading means 23-1 and 23-2 by one bit corresponding to each circuit. This reading output is assembled into the word composed of the bit corresponding to each circuit through shift register 26 and then delivered from output memory 27 in the from of 1-bit parallel signal of each circuit. The two pairs of memories 22 are combined by the mutual switching between data writing means 21 and data reading means 23. In such way, a collective parallel-serial conversion is ensured for a number of circuits.
机译:目的:通过基于固定规则读取供应到存储器中的电路的并行数据,然后将数据转换为并行电路的信息和串行数据,对多个电路进行集体并行-串行转换处理以确保多个电路的并行并行-串行转换。组成:数据写入装置21-1和21-2的信号,它们将从外部串行给出的数据依次写入每个电路并行位,以供写入两对存储器22-1和22-2中的任何一个。然后,通过数据读取装置23-1和23-2以与每个电路相对应的一位来读出写入两对存储器另一侧的数据。该读取输出通过移位寄存器26被组装成由与每个电路相对应的位组成的字,然后以每个电路的1位并行信号的形式从输出存储器27传送。通过在数据写入装置21和数据读取装置23之间的相互切换来组合两对存储器22。以这种方式,确保了多个电路的集体并行-串行转换。

著录项

  • 公开/公告号JPS556957A

    专利类型

  • 公开/公告日1980-01-18

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD;

    申请/专利号JP19780079419

  • 发明设计人 HATA FUSAO;YOSHIHARA MASAHARU;

    申请日1978-06-30

  • 分类号H03M9/00;G06F13/00;H04L13/00;H04L29/02;

  • 国家 JP

  • 入库时间 2022-08-22 18:44:08

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