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Clock phase control method for a digital data receiving system, phase recovery circuit for carrying out this method and digital data receiving system comprising this circuit
Clock phase control method for a digital data receiving system, phase recovery circuit for carrying out this method and digital data receiving system comprising this circuit
method of adjusting the phase of the clock circuit (3) for the reception of digital data.which provides for the elimination of frequencies in excess of 1 / t (t = period of data transmission)then the evaluation of the phase difference to correct the offset of the clock of the estimates with the sign.an example of the implementation of the system and process includes low pass filtering circuit (1a) and an evaluation circuit (2) and which sets, in accordance with the process.the optimal decision of the second circuit (3) is placed at the outlet of the adaptive filter (4).;application: all systems for the reception of digital data transmitted in linear modulation.
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