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Multi-processor computer system for performing a recursive algorithm.

机译:用于执行递归算法的多处理器计算机系统。

摘要

A multiprocessor computer system having a two-dimensional array of modules. Each module comprises two source connections for an activation signal for an algorithm, a program memory, a processor element and two destination connections for an activation signal for a corresponding algorithm. The processor element can split the task of a recursive algorithm into two partial tasks (of the same algorithm) or can execute an elementary partial task of this algorithm. The results of the partial tasks are returned in the direction wherefrom the relevant activation signal originated. For this purpose, each module in the array is connected to four neighboring modules. The peripheral modules are not only connected to at least two neighboring modules, but also to at least one module on an opposite side of the array. In each module there is one central process and for each connection there is one channel process, the central process communicating only with the channel processes of the relevant module. The latter processes provide the communication between the various modules.
机译:具有模块的二维阵列的多处理器计算机系统。每个模块包括用于算法的激活信号的两个源连接,程序存储器,处理器元件以及用于对应算法的激活信号的两个目的地连接。处理器元件可以将递归算法的任务分成两个(相同算法的)部分任务,或者可以执行该算法的基本部分任务。子任务的结果在产生相关激活信号的方向上返回。为此,阵列中的每个模块都连接到四个相邻模块。外围模块不仅连接到至少两个相邻模块,而且连接到阵列相对侧上的至少一个模块。在每个模块中,都有一个中央过程,对于每个连接,都有一个通道过程,该中央过程仅与相关模块的通道过程进行通信。后面的过程提供了各个模块之间的通信。

著录项

  • 公开/公告号NL8002787A

    专利类型

  • 公开/公告日1981-12-16

    原文格式PDF

  • 申请/专利权人 N.V. PHILIPS GLOEILAMPENFABRIEKEN TE EINDHOVEN.;

    申请/专利号NL19800002787

  • 发明设计人

    申请日1980-05-14

  • 分类号G06F15/16;G06F15/332;G06F5/00;

  • 国家 NL

  • 入库时间 2022-08-22 13:42:52

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