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schaltungsanordnung for detecting predetermined binaerwerte certain minimum.

机译:用于检测预定二进制值的电路一定是最小值。

摘要

A circuit arrangement recognizes predetermined binary values of a specific minimum duration. Data from a plurality of data sources are emitted to a common data line by way of a respective switch. An address generator periodically generates data source addresses which are emitted, on the one hand, to a respective counting device and, on the other hand, to an address decoder. The address decoder decodes the data source addresses and generates corresponding switching signals which connect the data sources to the data line in temporal succession by way of the switches. The counting devices assigned counter readings to all data sources, the counter readings being changed by respective unit upon identification of the predetermined binary values. Upon attainment of predetermined counter readings, recognition signals and the assigned data source addresses are emitted.
机译:电路装置识别特定最小持续时间的预定二进制值。来自多个数据源的数据通过各自的开关被发送到公共数据线。地址生成器周期性地生成数据源地址,该数据源地址一方面被发送到相应的计数设备,另一方面被发送到地址解码器。地址解码器对数据源地址进行解码并生成相应的切换信号,该切换信号通过开关在时间上连续地将数据源连接到数据线。计数装置将计数器读数分配给所有数据源,计数器读数在识别到预定二进制值后由相应的单元更改。在达到预定的计数器读数时,将发射识别信号和分配的数据源地址。

著录项

  • 公开/公告号AT5622T

    专利类型

  • 公开/公告日1983-12-15

    原文格式PDF

  • 申请/专利权人 SIEMENS AKTIENGESELLSCHAFT;

    申请/专利号AT19800103934T

  • 发明设计人 WILMERS GERHARD DIPL.-PHYS.;

    申请日1980-07-09

  • 分类号H04L11/06;H04L5/22;H04Q9/00;

  • 国家 AT

  • 入库时间 2022-08-22 09:08:58

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