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TROUBLE ANALYSIS OF INTEGRATED CIRCUIT

机译:集成电路的问题分析

摘要

PURPOSE:To enable easy detection of a troubled position by coating on the surface of the chip of an integrated circuit with a heat sensitive material or an infrared sensitive material, hermetically sealing and carrying out an electrical destruction test. CONSTITUTION:An LSI chip 1 is bonded 3 with a wire and coated with, e.g., heat sensitive resin 2 thinly and hermetically sealed to make a sample for destruction by an electrostatic destruction test or a surge test, a hot spot is generated and if the temperature of the hot spot exceeds the eutectic temperature of aluminum or silicon or the melting temperature of silicon, a contact or a junction has a trouble. And, if the withstand limit of an oxidized film is exceeded, the oxidized film is destructed and the current is concentrated on the destruction point and heat is generated. In order to detect the change of temperature, a heat sensitive material or an infrared sensitive material is used. At the current concentration point, rapid change of the magnetic field also arises and a magnetic material is coated for detection whereby change of the magnetic field of the magnetic material is detected by a secondary electron image of SEM.
机译:目的:通过在集成电路芯片的表面上涂上热敏材料或红外敏感材料,气密密封并进行电毁坏测试,从而能够轻松检测故障位置。组成:LSI芯片1用导线键合3并涂有例如热敏树脂2,然后薄薄地气密密封以制成要通过静电破坏测试或电涌测试破坏的样品,如果产生热斑,则热点的温度超过铝或硅的共晶温度或硅的熔化温度,因此接触或结点有问题。并且,如果超过氧化膜的耐受极限,则氧化膜被破坏并且电流集中在破坏点上并且产生热量。为了检测温度的变化,使用热敏材料或红外敏感材料。在电流集中点处,也出现磁场的快速变化并且涂覆磁性材料以进行检测,由此通过SEM的二次电子图像来检测磁性材料的磁场变化。

著录项

  • 公开/公告号JPS60105245A

    专利类型

  • 公开/公告日1985-06-10

    原文格式PDF

  • 申请/专利权人 NIPPON DENKI KK;

    申请/专利号JP19830213639

  • 发明设计人 ANDOU TAKESHI;

    申请日1983-11-14

  • 分类号H01L21/66;

  • 国家 JP

  • 入库时间 2022-08-22 08:36:27

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