Semiconductor integrated circuit device having a high tolerance of abnormal high input voltages

摘要

PURPOSE:To prevent the damage of an MIS element due to extraordinarily high voltage without loss of the integration and the characteristics by connecting an external terminal through a diffused region to the element and increasing the withstand voltage of the element higher than that of the diffused region. CONSTITUTION:When an input is connected to the gate electrode 1 of an FET in an MOS circuit, an input resistor 11 made of diffused region is inserted and connected between an external terminal 10 and the gate electrode 1. The gate insulating film of the input FET is increased in thickness to become higher than the withstand voltage (the breakdown voltage of the junction) of the resistor 11 at the withstand voltage. When it is inputted to the source region 5' of the FET, a source electrode 2 is connected to a resistor 13, the source junction of the input FET is deeper in depth than the FET of the internal circuit, and the channel region 4' is increased in length. Thus, it can prevent the damage of the FET due to extraordinarily high input voltage without specific protecting circuit.