Method for reducing a digital noise signal comprising a sequence of pulsed interference in a digital input signal and circuit arrangement to carry out this method

摘要

The invention relates to a method for reducing a digital noise signal comprising a sequence of pulsed interference and a digital circuit arrangement to carry out this method. The digital input signal (Xe) comprising a digital useful signal and the digital noise signal is used as the output signal (Xa) of this circuit arrangement if the magnitude of the difference between the input signal value (Xe) and the output signal value (Xa) delayed by one clock cycle is no greater than a predefined value (G) which is equal to the magnitude of the maximum possible change in two consecutive useful signal values. If, however, the aforementioned magnitude is greater than the predefined value (G), a low-pass-filtered signal (Xr) generated from the input signal (Xe) is used as the output signal (Xa). The value of the input signal (Xe) delayed by one clock cycle is used to provide initial values in the low-pass filtering. IMAGE