DATA PROCESSING SYSTEM HAVING COMMON BUS AND PREFERENCE DECISION CIRCUIT

摘要

PURPOSE: To perform priority control by a fixed priority system, a progressive system and the mixed system with simple constitution by providing the highest priority register and the lowest priority register in respective bus masters. CONSTITUTION: The value of the lowest priority register 7 of the request priority decision circuit 5 of the bus master is set to a request priority counter 8 first. Then, the value of the counter 8 is counted down for one at the point of time when one of the bus masters starts using a bus. In the meantime, the contents of the counter 8 are supplied to an arbitration bus 3 and a comparator 9 and compared with the contents of the highest priority register 6. Then, when they match, a bus using plate is acquired and the contents of the register 7 are set to the counter 8 again. Thus, by arbitrarily setting the contents of the registers 6 and 7, bus arbitration is performed by various forms.