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Hatsushinsochi

机译:第一项新措施

摘要

PURPOSE:To prevent the output of a clock signal when an oscillation is unstable, by controlling the generation of the clock signal from an oscillator by means of a detecting circuit that detects both the rise and fall of an external input signal and then driving a microprocessor. CONSTITUTION:An oscillator 2 has the oscillation with the driving of a quartz oscillator 1 and generates a clock signal 11 having a prescribed frequency necessary for a microprocessor 10. At the same time, the oscillator 2 receives the clock start signal from a rise detecting circuit 4 that detects the rise of an external input signal and then starts the generation of the signal 11. After this, a transmission control circuit 8 supplies the signal 11 given from the oscillator 2 to the processor 10 in the form of a working clock signal 9 for a period during which a clock supply signal 7 is fed from a fall detecting circuit 5 that detects the fall of the external input.
机译:目的:为防止在振荡不稳定时输出时钟信号,通过检测电路来控制振荡器产生的时钟信号,该检测电路可检测外部输入信号的上升和下降,然后驱动微处理器。组成:振荡器2在石英振荡器1的驱动下发生振荡,并产生具有微处理器10所需的指定频率的时钟信号11。同时,振荡器2从上升检测电路接收时钟启动信号如图4所示,其检测外部输入信号的上升,然后开始生成信号11。此后,传输控制电路8以工作时钟信号9的形式将从振荡器2给出的信号11提供给处理器10。在一段时间内,时钟供应信号7从检测外部输入的下降的下降检测电路5馈送。

著录项

  • 公开/公告号JPH0230210B2

    专利类型

  • 公开/公告日1990-07-05

    原文格式PDF

  • 申请/专利权人 NIPPON ELECTRIC CO;

    申请/专利号JP19810088986

  • 发明设计人 KONDO OSAMU;TOJO AKINORI;HAYASHI YUTAKA;

    申请日1981-06-10

  • 分类号H03L7/00;

  • 国家 JP

  • 入库时间 2022-08-22 06:22:01

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