the invention u043eu0442u043du043eu0441u0438u0442u0441u00a0 to computer technology and radio engineering and can be used in systems u0440u0430u0434u0438u043eu0443u043fu0440u0430u0432u043bu0435u043du0438u00a0 and u0440u0430u0434u0438u043eu0430u0432u0442u043eu043cu0430u0442u0438u043au0438. the objective is to reduce the error u0438u0437u043eu0431u0440u0435u0442u0435u043du0438u00a0 u0438u043du0442u0435u0433u0440u0438u0440u043eu0432u0430u043du0438u00a0.integrator includes a first adder 1, a first multiplier 2 to u043fu043eu0441u0442u043eu00a0u043du043du044bu0439 coefficient, the second adder 3, the first block of 4 u0438u043du0432u0435u0440u0442u0438u0440u043eu0432u0430u043du0438u00a0 plate block 5 delays the third c u0443u043cu043cu0430u0442u043eu0440 6, the second multiplier 7 to u043fu043eu0441u0442u043eu00a0u043du043du044bu0439 coefficient, the second block 8 u0438u043du0432u0435u0440u0442u0438u0440u043eu0432u0430u043du0438u00a0 sign, the fourth adder 9, 10 to the third multiplier u043fu043eu0441u0442u043eu00a0u043du043du044bu0439 coefficient, u043fu00a0 nuts adder 11. 2).
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