PURPOSE:To exclude a waste for a processing time and to attain high speed operation by providing 1st and 2nd coded digit number use multipliers and a coded digit number.twos complement display binary number converter and executing only once the conversion into a twos complement binary number. CONSTITUTION:An output of a 1st coded digit number use product sum computing element 1 is a coded digit number and it is inputted to a 2nd coded digit number use product sum computing element 2 without conversion into a twos complement binary number. Then a coded digit number.twos complement display binary number converter 3 converts the coded digit number into the coded digit number twos complement display binary number to output the twos complement display binary number as the final result. Then both the 1st and 2nd product sum operate and multiplication are implemented by using the coded digit number in which the propagation of a carry signal is suppressed to one digit with high speed operation and a fast speed two-dimension digital filter circuit is obtained.
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