The invention relates to a switching device utilising a series or cascode make/break switch arrangement consisting of a bipolar transistor T1 and a field-effect transistor FET T2. A bipolar MOS semiconductor with feedback T3 is coupled to the base of the bipolar transistor T1, the conducting of T3 being governed by the state of the FET T2. A preferably CMOS protection circuit 10 is associated with the cascode arrangement. Application to fast power-switching devices. IMAGE
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