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CMOS ANALOG MULTIPLYING CIRCUIT

机译:CMOS模拟乘法电路

摘要

the circuit includes a first transistor (1) is described, the current electrodes) that are coupled between a first line and a first reference voltage node, and the gate electrode is coupled to a first node of the gate which, in use,an input voltage so that the transistor operates in the region of the triad, a second transistor (2) whose current electrodes are coupled between the first node and an output node.the last line is coupled to a second reference voltage, a comparator (3) for comparing a first voltage at the level of the first node with a second voltage level of a second node at entry and command the second transistor gate electrode, so that to maintain the first and second voltages substantially equal.the current passing through the second transistor is proportional to the product of the first and second voltages at input nodes.
机译:电路包括描述的第一晶体管(1),电流电极耦合在第一线和第一参考电压节点之间,栅电极耦合到栅极的第一节点,在使用中,该输入是输入第二晶体管(2)的电流电极连接在第一节点和输出节点之间,最后一条线连接到第二参考电压,比较器(3)在进入时比较第一节点的电平的第一电压与第二节点的第二电压电平,并命令第二晶体管栅电极,以保持第一和第二电压基本相等。流过第二晶体管的电流为与输入节点上第一电压和第二电压的乘积成比例。

著录项

  • 公开/公告号EP0349533B1

    专利类型

  • 公开/公告日1992-05-06

    原文格式PDF

  • 申请/专利权人 MOTOROLA INC.;

    申请/专利号EP19880901045

  • 发明设计人 RUSZNYAK ANDREAS;

    申请日1988-01-25

  • 分类号G06G7/163;

  • 国家 EP

  • 入库时间 2022-08-22 05:30:10

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