An integrated hardware generator (12) for generating digital signals representative of vectors, polygons and conics primitives and area fills therefore is disclosed. The primitive signals are used in the formation of a final digital output signal read into a bit map memory of a graphics display processor. Its operation is based on applying one or more of a set of internal subfunctions to generate mathematical solutions for rendering each geometric shape as a graphics primitive digital signal. The basic building block of the generator (12) is a digital differential analyzer (60) which is adapted to accumulate fractional (subpixel) components of x/y coordinate data and to signal when the accumulation overflows across pixel boundaries. This occurrence enables an increment or decrement of the x/y coordinates that indicate the pixel addres to be loaded (drawn). The digital differential analyzer (60) forms an independent vector generator and comprises a pair of input differential comparators (62), an arithmetic logic unit (64) and register and counter files (66a, 66b). On receipt of a command from a host processor the comparators (62) receive updated x and y data, compare them to the present values which are stored in the register file (66) and forward the differences to the arithmetic logic unit (64). When either the x or y value exceeds the pixel boundary, the arithmetic logic unit (64) computes the coordinates of the next pixel to be filled and inserts them into the register file (66) to replace the previous values.
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