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Semiconductor integrated circuit device having additional capacitor effectively decreasing parasitic capacitance coupled with resistor
Semiconductor integrated circuit device having additional capacitor effectively decreasing parasitic capacitance coupled with resistor
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机译:具有附加电容器的半导体集成电路器件,该电容器有效地减小了与电阻器耦合的寄生电容
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摘要
A semiconductor integrated circuit device is fabricated on a semiconductor substrate (11) having a lightly doped p-type silicon bulk (11a) and a lightly doped n-type epitaxial layer (11b), and a resistor is formed on a field oxide film (12) grown on the lightly doped n-type epitaxial layer, wherein a trench isolation (13a/ 13b/ 14a/ 14b) penetrates from the field oxide film into the lightly doped p-type silicon bulk for allowing a part (11c) of the lightly doped epitaxial layer under the resistor to enter electrically isolating state, thereby decreasing parasitic capacitance coupled with the resistor by virtue of an additional junction capacitor coupled in series therewith.
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