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Method of increasing the layout efficiency of dies on a wafer, and increasing the ratio of I/O area to active area per die
Method of increasing the layout efficiency of dies on a wafer, and increasing the ratio of I/O area to active area per die
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机译:增加晶片上管芯的布局效率并增加每个管芯的I / O面积与有效面积之比的方法
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摘要
Certain non-square dies, such as triangular dies (e.g. 202a, 202b,...), greatly elongated rectangular dies, parallelogram dies, trapezoidal, and the like, are able to be laid out in the area of a circular semiconductor wafer (204) more "efficiently" than square dies. Further, a peripheral area of these certain non-square dies is advantageously increased relative to the area contained within the peripheral area, to accommodate increased I/O connections to the active elements of the die (202a, 202b,...).
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