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Amplifier circuit, which gives an amplified output signal as a function of complementary input signals supplies

机译:放大电路,根据补充输入信号提供放大的输出信号

摘要

The DRAM sense amplifier (30) contains 'current mirror' configured PMOS FET's (1,3), with switching transistors (22,21) connected to preamplifier activation signal input (PAE). Gates of the 'current mirror' PMOS FET's are connected to junction of the second PMOS and a second NMOS FET (3,4). A differential input signal (/VI,VI) is input to NMOS FET's (2,4). In operation the circuit is activated by a high level signal on PAE, turning a transistor (7) on, and further transistors (10,11,22) off. For a low level on the input (VI), three transistors (1,3,4) turn off, one transistor (21) turns on. The /VI transistor (2) switches in response to a high level on input (/VI) to output low level at the output (VO). USE/ADVANTAGE - For DRAM applications. Use of current mirror and complementary transistors configuration implements fast low-power sense amplifier.
机译:DRAM读出放大器(30)包含配置有“电流镜”的PMOS FET(1,3),并且开关晶体管(22,21)连接到前置放大器激活信号输入(PAE)。 “电流镜” PMOS FET的栅极连接到第二PMOS和第二NMOS FET(3,4)的结。差分输入信号(/ VI,VI)输入到NMOS FET(2,4)。在操作中,该电路由PAE上的高电平信号激活,从而使晶体管(7)导通,而另外的晶体管(10、11、22)截止。对于输入(VI)上的低电平,三个晶体管(1、3、4)截止,一个晶体管(21)导通。 / VI晶体管(2)响应输入(/ VI)上的高电平进行切换,以在输出(VO)上输出低电平。使用/优势-用于DRAM应用。使用电流镜和互补晶体管配置可实现快速的低功耗读出放大器。

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