1.u0435u0434u043du043eu043fu043bu0430u0442u043au043eu0432 microcomputer microcomputer including u0435u0434u043du043eu0447u0438u043fu043eu0432 with entrance for the initial reset, connected through a capacitor to the supply voltage.the condenser is connected u043au0430u0442u043eu043fu0430u0440u0430u043bu0435u043bu043du043e button for initial establishment in which input - the sewer u0435u0434u043du043eu0447u0438u043fu043eu0432u0438u044f microcomputer which generates the byte the addressis connected to the inputs of a memory address inputs and the u0435u0440rom and ram, and input - the channel which generates byte of the address and junior exchange datais connected u043au044au043cu0432u0445u043eu0434u043eu0432u0435u0442u0435 to register and the memory data u0435u0440rom and ram as the register address inputs are connected to the memory eprom and ram.and u0442u0430u043au0442u043eu0432u0438u044fu0442 entrance of the register is connected to the memory address of u0435u0434u043du043eu0447u0438u043fu043eu0432u0438u044f permission for microcomputer characterized by thisthat the initial reset (res) of u0435u0434u043du043eu0447u0438u043fu043eu0432u0438u044f microcomputer (1) relates also to the controller for the initial calibration of display and keyboard (10), paral deer adapter (20)control scheme (19) and d flip-flop (24), and input - the channel (r2) producing the byte of the address is involved also in buffer (15) to one of u0435u043cu0443u043bu0430u0446u0438u044f (13), and input and u0437u0445u043eu0434u043du0438u044fu0442 channel (ro)junior byte address generating and exchange the data relates also to the data controller of indication u0438u043au043bu0430u0432u0438u0430u0442u0443u0440u0430 (10)for the data of parallel adapter (20) and in buffer (14) to the plug for u0435u043cu0443u043bu0430u0446u0438u044f (13), the register (2) also relate to the address
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