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How to form buried bitline in Flash EEPROM

机译:如何在Flash EEPROM中形成掩埋位线

摘要

The present invention comprises the steps of forming a field oxide film 6 on a predetermined portion of the semiconductor substrate 1, forming a photoresist film 5 'pattern, which is a mask for a buried bit line, and implanting cobalt ions into a wafer. Embedded implantation of a flash EEPROM comprising the steps of performing ion implantation so that ions reach under the field oxide film 6 while applying a temperature of 400 to 500 ° C., and annealing the wafer. The present invention relates to a formation method, which uses a single crystal CoSi 2 layer as a bit line instead of an ion implanted BN + layer to greatly reduce bit line resistance. In addition, since the CoSi 2 layer is formed after the field oxidation process, there is little lateral diffusion, thereby ensuring more space margin between bit lines, which improves punch through characteristics and reduces cell size, thereby contributing to the improvement of device quality. It works.
机译:本发明包括以下步骤:在半导体衬底1的预定部分上形成场氧化膜6,形成光致抗蚀剂膜5'图案,该图案是用于掩埋位线的掩模,以及将钴离子注入到晶片中。闪存EEPROM的嵌入式植入包括以下步骤:执行离子植入,以使离子在施加400至500℃的温度的同时到达场氧化膜6的下方,并对晶片进行退火。本发明涉及一种形成方法,该方法使用单晶CoSi 2 层作为位线而不是离子注入的BN + 层来大大降低位线电阻。此外,由于在场氧化工艺之后形成了CoSi 2 层,因此几乎没有横向扩散,从而确保了位线之间的更多空间裕度,从而改善了穿通特性并减小了单元尺寸,从而有助于改善设备质量。有用。

著录项

  • 公开/公告号KR950026016A

    专利类型

  • 公开/公告日1995-09-18

    原文格式PDF

  • 申请/专利权人 김주용;

    申请/专利号KR19940003903

  • 发明设计人 조병진;

    申请日1994-02-28

  • 分类号H01L27/115;

  • 国家 KR

  • 入库时间 2022-08-22 04:10:48

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