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Prodn. of test pattern for identifying transit time faults in logic circuit
Prodn. of test pattern for identifying transit time faults in logic circuit
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机译:产品逻辑电路中识别渡越时间故障的测试模式的设计
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摘要
The gate plane is located between the input and output. the test path is divided in to at least two part test paths, to produce unambiguous "forking". Urgent necessary value applications are carried out directly for each part test path selected, for the spread of a signal value change. With each "forking" the hitherto test pattern prodn. status is stored. So that later in a further method step it can be recalled. If an output is reached, concluding signal value applications, not yet adjusted, are ensured by optional value allocations. Whilst a known back-track search method is used. With this, for different test path variants, which have common part test path, it avoids the compulsory carrying out of the urgent necessary multiple value applications.
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