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Memory circuit with erasable, programmable memory, generator for generating a programming voltage for the memory, voltage regulator and edge regulator, both suitable for use in the generator, and a diode element.
Memory circuit with erasable, programmable memory, generator for generating a programming voltage for the memory, voltage regulator and edge regulator, both suitable for use in the generator, and a diode element.
The invention relates to a memory circuit comprising an (E)EPROM, and a programming voltage generator. This generator comprises a charge pump, a programming voltage controller and an edge controller which limits the increase of the programming voltage per unit of time. In a memory circuit in accordance with the invention the controllers are fed back to the charge pump in order to switch the charge pump on or off in dependence on the programming voltage (variation).
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