Semiconductor device including clock selection circuitry selecting between high and low frequency clock signals for reduced power consumption

摘要

A semiconductor device and an electronic apparatus with the semiconductor device incorporated therein, include a sense amplifier so that a storage device can be read at a high speed and at a low speed, whereby low power consumption may be realized driving low speed reading. When a high speed mode is set and a read instruction is given, the sense amplifier is driven to send out a signal of a bit line to a data bus through the sense amplifier, while when a low speed mode is set and a read instruction is given, a sense amplifier is brought into a non-driven state to send out a signal of a bit line to a data bus without going through the sense amplifier. The semiconductor device may also include a clock control circuit and a clock selection circuit for selecting a high frequency clock signal when the high speed mode is set and for selecting a low frequency clock signal when the low speed mode is set.